1. Fieid of the Invention
The present invention is related to semiconductor devices with heat-fusible elements and, more particularly, to a method of forming heat-fusible elements on integrated circuit (IC) chips.
2. Background Description
Semiconductor fusible links are used for both activating redundancy in memory chips and for programming functions and codes in logic chips. Typical fusible links may are large structures blown by eternal heat, e.g. from a laser, or from electrical current passed through the fuse.
A typical laser blown fuse is 1 .mu.m wide by 8 .mu.m long. Also, because of the size of the laser spot used to program the fuses, laser blown fuse links must be spaced some distance apart (approximately 10 .mu.m) and, in some instances, guard structures must be placed between fuses to prevent damage to adjacent fuses.
Typically, state of the art electrically blown fusible links, must not melt at normal operating current/voltage chip conditions to avoid inadvertently blown fuses. So, state of the art electrically programmed fuses require relatively large currents to open the fuse link. Therefore, higher current/voltage levels are supplied, typically, by external sources to program electrically blown fuses.
One way of facilitating melting fuse links is to provide a resistive heat source under the fusible link. See, for example, U.S. Pat. No. 4,814,853 entitled "Semiconductor Device With Programmable Fuse" to Uchida. Uchida teaches placing a fusible link on a thin insulator above a resistive wire. The resistive wire heats the fusible link to near its melting point and current passing through the link opens it. Unfortunately, Uchida requires that two sets of wires be provided to each fusible link, one for the fusible link and the other for the heater. Also, some of the heat generated in the resistive wire is partially thermally insulated by the insulating film dissipates into the chip below it.
Consequently, state of the art fusible link structures currently use a significant amount of chip surface area. Space is also required to provide clearance for the physical disruption of the link and its surrounding area that may occur when the fusible link is blown. Thus, the area above and around the fusible link must be kept clear. There is a limit to wiring that can occur under the fusible link as well. As circuit density increases and chip sizes decreases, the area occupied by large fusible links remains a problem.
Thus, there is a need for a very small and compact fusible link that uses less chip surface space.